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Apple Silicon Quest

New: 2026-09-15Updated: 2026-09-15

The chip under every family app — what it was built for, what AI found in it, and what it still owes

Apple Silicon Quest is the hardware floor under the CWK family: what an M-series chip actually is, why its memory sits where it sits, what a language model asks of it token by token, how it stands against NVIDIA and the rest of the industry, and how one household's nine Macs put it to work. Every claim carries its evidence label — physics, vendor claim, measured, or our judgment — so you can tell the arithmetic from the marketing and both from the house position.

15 tracks · 91 lessons · ~21h · difficulty: intermediate-to-advanced

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This is not an MLX course, not a buyer's guide, and not an Apple fan letter. It is a hardware quest built by a household that runs its whole AI stack on Apple silicon while its founder still thinks the industry should be modular. Both facts are in here, refereed by Christensen: integrated designs win while a product is not good enough, modular ones win once it overshoots, and local inference in 2026 is plainly in the first regime. Part 1 maps the chip as it was designed before AI — a phone SoC that grew up, four tiers, three different things "monolithic" can mean, and the unified memory whose bandwidth and capacity you buy once. Part 2 is what AI found in it: prefill is compute-bound, decode is bandwidth-bound, the decode ceiling is bandwidth divided by bytes per token, the KV cache grows while you talk, and a lab track where you write the prediction before you run the measurement on real M3 machines. Part 3 is the rivals — CUDA as a twenty-year ecosystem rather than a chip, the VRAM wall and the multi-GPU tax, and every vendor converging on unified memory in its own way. Part 4 is one household's fleet at work: an inference hub serving thin clients, a control plane leasing jobs to a worker, big open checkpoints and the arithmetic of fitting them, RDMA over Thunderbolt on paper and in practice, then Apple's homework — why unified memory does not simply grow past 512 GB, argued as thought experiments — and the edge era read as direction and timing, two different variables. Fifteen tracks, ninety-one lessons, real Python you can run on your own Mac, and a card you fill in about that Mac from the first track to the last.

Tracks

01🗺️The Map Before the Silicon
0/6 lessons
A phone chip that grew up, four tiers, six generations, three meanings of monolithic, and the fleet this quest measures on
Before a single benchmark, get the nouns right. What an Apple silicon chip actually is (a system on a chip that inherited its memory layout from the iPhone), what changes between Base, Pro, Max and Ultra (mostly the width of the memory bus and the number of dies), how the six generations line up when you name them honestly, and the three different things people mean when they say "monolithic". Then the laboratory: nine Macs in one household, which four of them this quest measures on and why, and the four evidence labels every later claim will carry.
Lesson list (6)
Quiz · 5 questions→
02🧩Monolithic vs Modular
0/6 lessons
The open box that won in 1981, what an interface gives and takes, Christensen as referee, and the strongest case against Apple's design
The argument this quest was commissioned to have, had properly. The IBM PC's open architecture built a horizontal industry on published interfaces, and that model won the desktop for forty years. An interface buys substitution and competition and charges for it in copies, latency, power and board area. Christensen's theory says which side wins when: integrated designs while a product is not good enough, modular ones once it overshoots. Then the two facts that keep the argument honest — modularity did not die under Apple silicon, it moved inside the package where no owner can reach it — and the founder's case against monolithic design stated in its strongest form, followed by what must be admitted anyway.
Lesson list (6)
Quiz · 5 questions→
03🧠The CPU and the Rest of the SoC
0/6 lessons
Someone else's instruction set, wide cores, three kinds of core, silicon built for software, fixed-function blocks, and performance per watt
The part of the chip that is not the GPU or the memory — and why it is shaped the way it is. Apple designs its own cores for Arm's instruction set (an architecture license, not a core license); the cores are wide rather than fast-clocked because the objective was performance per watt; macOS sorts work onto efficiency, performance and — since M5 — super cores by quality of service, which is how a 24/7 fleet job and a foreground app share one die. Then the silicon that exists because of software: a memory-ordering mode that makes Rosetta possible, a matrix coprocessor Apple never named, a 16 KB native page size that translated processes never see (they get 4 KB). Fixed-function blocks — Neural Engine, media engines, Secure Enclave — each with the honest answer to whether a language model uses it. And the constraint that explains all of it: the whole design was for a battery first.
Lesson list (6)
Quiz · 5 questions→
04🎛️The GPU and Unified Memory
0/5 lessons
A phone GPU's habits, one pool for two processors, where a discrete card's copy really lands, the boundary that was erased, and the GPU's public doors
The half of the chip that runs a language model, and the memory layout that made it interesting. Apple's GPU inherited a phone's habits — tile-based rendering, on-chip tile memory, a power budget before a performance target — and then found itself sharing one memory pool with the CPU. That sharing is the whole story: no copy between processors, no separate graphics memory to run out of, no isolation between whoever holds the GPU and everyone else. This track measures what the pool delivers on four Macs, shows exactly where a discrete card's copy happens and when it stops mattering, tells the household's thirteen-year GPU-arbitration story straight (including the author's own wrong diagnosis), and names the doors through which software reaches the GPU: Metal, Metal Performance Shaders, MLX, PyTorch's MPS backend, and the Tensor APIs of Metal 4.
Lesson list (5)
Quiz · 5 questions→
05🧮Memory Bandwidth and Capacity
0/6 lessons
Where 819 GB/s comes from, three memory technologies, capacity chosen once, the GPU's share, the swap cliff, and the fleet in one table
The two numbers that decide everything a language model does on a Mac, taught as the separate axes they are. Bandwidth is transfer rate times channels — derived, not quoted — and the three memory technologies (LPDDR, GDDR, HBM) are three different trades between speed, capacity, power and price. Capacity is soldered and chosen once, at purchase, which the 512 GB M3 Ultra's quiet withdrawal from Apple's configurator makes concrete. The operating system publishes how much of the pool the GPU may take, and that fraction is measured on four fleet Macs rather than quoted from lore. The swap cliff is the edge of the pool, measured against the SSD's real speed. And the track closes with the fleet in one table — spec, achieved, GB/s per GB, working set — the row your own Mac now joins.
Lesson list (6)
Quiz · 5 questions→
06⚛️What an LLM Asks of Hardware
0/7 lessons
Two workloads, the decode ceiling, a cache that grows while you talk, the honest benchmark, experts, a batch of one, and quantization
The physics that turns the memory track's numbers into tokens per second. Prefill is a matrix-matrix workload that wants compute; decode is a matrix-vector workload that wants bandwidth, because every generated token re-reads every active weight. The decode ceiling is bandwidth divided by bytes per token, and this track shows exactly which bytes count — not the vision tower, not the embedding table unless it is tied, routed experts at k of E — and then compares the ceiling to the fleet's measured ladder. The KV cache is measured per token from real config files, across two orders of magnitude of architecture, and the context curve is measured rather than assumed: decode and time-to-first-token at 10, 50 and 90% of a window. Mixture-of-experts changes the arithmetic and then disappoints it in practice; a batch of one is what a Mac serves and a thousand users is what a cloud serves; quantization buys room and speed in the same bytes.
Lesson list (7)
Quiz · 5 questions→
07🐭The Mouse Apple Stepped On
0/6 lessons
A deliberate foot, an accidental mouse, and a deliberate follow-through — told as history with the dates in order
The founder's phrase, made precise. Apple did not design unified memory for language models; it designed it for a phone, then scaled it up for video and 3D work on a laptop, two years before ChatGPT existed. That was the foot, and it was deliberate. The mouse was that decode — the phase that decides how fast a model talks — turned out to be bound by exactly the thing the phone layout had in abundance: memory bandwidth on a single pool that could be made very large. The community found the Mac before Apple did, with llama.cpp in 2023. Then Apple leaned in, on purpose: MLX, a 512 GB desktop, per-core Neural Accelerators, RDMA over Thunderbolt, a quad-die Ultra. And luck did not fix everything — the ceiling, the batch of one, the compute side of prefill, and the missing fence are still owed. Every date in this track is from a primary source.
Lesson list (6)
Quiz · 5 questions→
08🧭A Token's Journey
0/6 lessons
From a file on disk to unified memory pages, then one token through MLX, Ollama, PyTorch MPS and Core ML — and the same token through CUDA
Follow one token through every runtime the household actually uses, on the household's own machines. The weights leave a safetensors file as memory-mapped pages and become wired GPU memory; MLX runs prefill once and decode once per token through the same weights with a growing cache — written out by hand so the loop is visible. Ollama wraps two engines (llama.cpp's and, since 2026, MLX's), and its reported rate turns out to be more than one token per pass through the weights — the runner's log says so, and the physics track's ceiling is what made the number suspicious. PyTorch's MPS backend carries a bus-era programming model onto a machine with no bus: fast where ops are big, slow where a token is a thousand small ones, and a belief about what it cannot do outlived the release that fixed it. Core ML is the one path to the Neural Engine, measured on two shapes of work with the planner's own verdict. Then the same token on CUDA, where the copy across PCIe is real and everything after it is faster — the honest comparison, with the mlx quest's HOW linked rather than re-taught.
Lesson list (6)
Quiz · 5 questions→
09🔬Predict, Then Measure
0/6 lessons
The quest's own lab: the number written down before the run, four Macs of one household, and the gaps explained rather than excused
This is the track where the quest earns its evidence labels. Every decode number in the earlier tracks came from a small lab written for this quest and run on four of the household's Macs — a base M3, an M3 Max, an M3 Ultra and an M2 Ultra — on one day, with the same environment, the same fixed prompts and the same rule: write the physics prediction before pressing return. The first lesson is the protocol and the confession that made it necessary. Then bandwidth from decode speed by regression; the M3 ladder, where one microarchitecture at three sizes separates bandwidth from GPU count; the context curve at 10, 50 and 90% of a window, which is the only benchmark the household's doctrine says matters; the M2 Ultra against the M3 Ultra, same memory and a newer GPU, where the older chip wins the stage that matters; and finally how to read someone else's benchmark table — including one on this site — with a checker that turns a claimed rate into a fraction of a ceiling.
Lesson list (6)
Quiz · 6 questions→
10🟩NVIDIA and CUDA
0/6 lessons
The rival given its due: twenty years of platform, bandwidth and compute the Mac cannot match, the wall it builds instead, and where it is copying the Mac
A quest about Apple silicon that does not give NVIDIA its due is a brochure. This track does the division in NVIDIA's favour wherever the division goes that way. CUDA is not a chip: it is a platform seven times the age of MLX, with the libraries and the ported code that age buys. Where NVIDIA leads — memory bandwidth two to ten times the Mac's, tensor compute fifty times — the numbers are vendor figures and the ceilings they imply are printed beside the Mac's. Where the card stops is the VRAM wall, with the multi-GPU tax priced per token. Training is NVIDIA's ground, and Apple's own models are trained there. Then the odd fact: NVIDIA now builds unified memory too — GH200, GB200, the DGX Spark — with a bandwidth-per-gigabyte trade that lands it beside the Mac, not above it. The last lesson is the decision table the household actually used.
Lesson list (6)
Quiz · 5 questions→
11🧲Everyone Converges on Unified Memory
0/5 lessons
AMD's big APU, Intel's one-off, Qualcomm's Arm PCs, NVIDIA's Windows chip — what the copies prove about the architecture and about Apple's lead, and where the modular world strikes back
Six years after the M1, every PC silicon vendor sells a pool: AMD's Strix Halo and its 192 GB successor, Intel's memory-on-package Lunar Lake and the retreat its CEO announced on an earnings call, Qualcomm's Snapdragon X and X2, and NVIDIA's own Windows chip with a coherent 128 GB pool. This track lays them on one table with the two numbers that decide a pool — bus width times transfer rate, and the largest memory the vendor will sell — and finds every one of them on the same curve as the Mac, the widest at a quarter of the Ultra's width and the rest narrower. Copying proves the architecture was right and Apple's exclusivity weaker in the same breath; the modular track's referee decides what that means for the mouse Apple stepped on. The last lesson is where modular strikes back: CXL pools and shares, UCIe chiplets, memory on removable modules at server scale, and batch throughput — the half of the world where a wide bus to a small memory still wins.
Lesson list (5)
Quiz · 5 questions→
12🏠The Fleet at Work
0/7 lessons
Nine Macs, nine jobs: one inference hub serving thin clients, a control plane leasing work to a worker, memory search on the Mac next door, every Pippa surface able to go local, the cloud chosen for quality, and the wires between them
Part 4 turns the quest around: the same chip, seen from a household that runs nine of them for one AI daughter and thirty-odd family apps. Every claim is read live from the machines by role alias — service counts, what the hub serves, how many embeddings the memory search holds, which jobs the worker took and which summaries went to the cloud. The patterns are few and they repeat: one GPU host with many thin clients; a control plane that keeps the only database writer and leases jobs to a worker; a vector store on the Mac next door that moved runtimes when its runtime moved under it; a rule that any Pippa surface can take a local model at any time; and a rule, stated by the household, that the cloud is used for quality and not for lack of capability. The last lesson prices the wires, because pooling Macs is the big-models track's question and the wires are the answer's denominator.
Lesson list (7)
Quiz · 5 questions→
13🗄️Big Models at Home
0/5 lessons
Five real checkpoints in a household store, the arithmetic that says which fit one 512 GB Mac, quantizing to fit, pooling two Studios over RDMA on paper and in practice, and the line where experiment ends
The household keeps a model store: 4.58 terabytes of original open-weight checkpoints on a cold archive, catalogued by a small engine that fetches, verifies and lands them and runs nothing. This track does the arithmetic on those five real files. Which fit one 512 GB Studio at 4 bits, which need two Macs, which fit no Mac in the house — and at what decode ceiling, by the experts lesson's active-bytes rule. Then quantizing to fit: what bits buy, what they cost, and the one command that turns a 1.5 TB BF16 archive into a runnable. Then RDMA over Thunderbolt: Apple's requirement, which Macs qualify, what two public multi-Mac results show when read with the lab's checklist, and the household's own verdict from its experiments — not practical, not the time. The last lesson draws the line the household drew between an experiment that proves a thing can be done and an operation that must keep doing it.
Lesson list (5)
Quiz · 5 questions→
14📐Apple's Homework
0/8 lessons
Why the pool stops at 512 GB even though a terabyte would sell — worked as thought experiments on wires, dies, tiers, flash and scale-out, ending in a checklist for staying ahead at the edge
A track of thought experiments, labeled as this quest's judgment throughout. The question that looks easy: if 512 GB of unified memory sells, why not 1 TB? The 2026 memory market is real context — LPDDR5X contract prices up ninety per cent in a quarter, a Mac Studio configuration withdrawn, a rival's desktop repriced — and the household's position is that price is not the ceiling's cause. So the track supposes memory were free and asks what would still stop the pool: bandwidth per gigabyte, which falls as the pool grows; the length of every wire on a 1,024-bit bus, which is why the memory is soldered; die density, which arrives on the memory vendors' roadmap and not Apple's; whether two tiers beat one pool; whether flash can be a third; and why scaling out across Macs does not scale up. It ends with a checklist — eight items, each priced by an earlier lesson — for what Apple would have to do to keep leading at the edge.
Lesson list (8)
Quiz · 6 questions→
15🌅The Edge Era
0/6 lessons
The last rung when every cloud is down, availability as local's real value, the work that fits the edge, the machine that freezes while the cloud moves, direction against timing, and the two floors this quest and Swift Quest lay
The closing track turns the chip into a position. The household's coding agent ends its ladder of legs on a local model with a slimmed harness, and its own definition of done is that bottom rung running bare on a fresh Mac — the last rung when every cloud is down. Local's real value is availability, not privacy, and the household says so. The work that fits the edge is the 95%'s: short-context, latency-tolerant jobs the fleet already runs, while whole-repo coding is the wrong workload for a pool whose common doors keep no prefix cache across turns. The machine freezes while the cloud moves — the household's own queue shows the model under one seat swapped three times at one price, and its purchase arithmetic puts three years of frontier seats against one frozen tier. Direction is not timing: the household's doctrine, in the hardware half this quest can price, with a term for the waiting. And two floors: Swift Quest is the software floor under the family's apps, this quest the silicon floor under both, and the reader's Mac card closes as a decision table.
Lesson list (6)
Quiz · 6 questions→

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Tracks

01🗺️The Map Before the Silicon

02🧩Monolithic vs Modular

03🧠The CPU and the Rest of the SoC

04🎛️The GPU and Unified Memory

05🧮Memory Bandwidth and Capacity

06⚛️What an LLM Asks of Hardware

07🐭The Mouse Apple Stepped On

08🧭A Token's Journey

09🔬Predict, Then Measure

10🟩NVIDIA and CUDA

11🧲Everyone Converges on Unified Memory

12🏠The Fleet at Work

13🗄️Big Models at Home

14📐Apple's Homework

15🌅The Edge Era